From 8035153b27cfc402a4b7a5c42163ecfc5d776468 Mon Sep 17 00:00:00 2001
From: gullahmed1 <gull.ahmed@10xengineers.ai>
Date: Mon, 18 Dec 2023 12:49:48 +0500
Subject: [PATCH] update doc

---
 docs/zba.rst | 71 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 71 insertions(+)
 create mode 100644 docs/zba.rst

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+[#zba,reftext=Address generation instructions]
+=== Zba extension
+
+[NOTE,caption=Frozen]
+====
+The Zba extension is frozen.
+====
+
+The Zba instructions can be used to accelerate the generation of addresses that index into arrays of basic types (halfword, word, doubleword) using both unsigned word-sized and XLEN-sized indices: a shifted index is added to a base address.
+
+The shift and add instructions do a left shift of 1, 2, or 3 because these are commonly found in real-world code and because they can be implemented with a minimal amount of additional hardware beyond that of the simple adder. This avoids lengthening the critical path in implementations.
+
+While the shift and add instructions are limited to a maximum left shift of 3, the slli instruction (from the base ISA) can be used to perform similar shifts for indexing into arrays of wider elements. The slli.uw -- added in this extension -- can be used when the index is to be interpreted as an unsigned word.
+
+The following instructions (and pseudoinstructions) comprise the Zba extension:
+
+[%header,cols="^1,^1,4,8"]
+|===
+|RV32
+|RV64
+|Mnemonic
+|Instruction
+
+|
+|&#10003;
+|add.uw _rd_, _rs1_, _rs2_
+|<<#insns-add_uw>>
+
+|&#10003;
+|&#10003;
+|sh1add _rd_, _rs1_, _rs2_
+|<<#insns-sh1add>>
+
+|
+|&#10003;
+|sh1add.uw _rd_, _rs1_, _rs2_
+|<<#insns-sh1add_uw>>
+
+|&#10003;
+|&#10003;
+|sh2add _rd_, _rs1_, _rs2_
+|<<#insns-sh2add>>
+
+|
+|&#10003;
+|sh2add.uw _rd_, _rs1_, _rs2_
+|<<#insns-sh2add_uw>>
+
+|&#10003;
+|&#10003;
+|sh3add _rd_, _rs1_, _rs2_
+|<<#insns-sh3add>>
+
+|
+|&#10003;
+|sh3add.uw _rd_, _rs1_, _rs2_
+|<<#insns-sh3add_uw>>
+
+|
+|&#10003;
+|slli.uw _rd_, _rs1_, _imm_
+|<<#insns-slli_uw>>
+
+|
+|&#10003;
+|zext.w _rd_, _rs_
+|<<#insns-add_uw>>
+
+|===
+
+